发明名称 SECURE FIELD-PROGRAMMABLE GATE ARRAY (FPGA) ARCHITECTURE
摘要 A method and system for configuring a field-programmable gate array (FPGA) includes receiving an encrypted FPGA load-decryption key at an FPGA from a remote key-storage device. The remote key-storage device may be external to and operatively connected with the FPGA. The encrypted FPGA load-decryption key is decrypted using a session key, which may be stored at both the FPGA and the remote key-storage device. Encrypted FPGA-configuration data is received at the FPGA, and decrypted and authenticated using the decrypted FPGA load-decryption key. The decryption of the FPGA-configuration data may indicate a cryptographic state associated with the FPGA-configuration data, which may be used in recurring authentication of the FPGA-configuration data. For recurring authentication, a challenge message may be received at the FPGA from an authentication device, which may be encrypted using the cryptographic state and the session key to generate a response message. The response message may then be sent to the authentication device to determine authenticity of the FPGA-configuration data.
申请公布号 US2012047371(A1) 申请公布日期 2012.02.23
申请号 US20100861586 申请日期 2010.08.23
申请人 WOODALL THOMAS R.;RAYTHEON COMPANY 发明人 WOODALL THOMAS R.
分类号 G06F21/00 主分类号 G06F21/00
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