| 摘要 |
<P>PROBLEM TO BE SOLVED: To accelerate a testing speed by suppressing influences of a time-lag in a timing edge generation circuit even when a rate signal becomes fast. <P>SOLUTION: A semiconductor testing apparatus 1 which generates a waveform for testing a DUT, includes: a plurality of timing memories 10 which store timing different from each other as timing data and are provided as many as the maximum number of times of changing a waveform during one term; a plurality of timing edge generation circuits 11 which generate timing edges in timing of timing data with a rate signal as a criterion and are provided more than the number of timing memories; a matrix circuit 5 for inputting timing data from any arbitrary timing memory to any arbitrary timing edge generation circuit 11; and a waveform output section 6 for outputting a waveform on the basis of the timing edge generated by the timing edge generation circuit 11. <P>COPYRIGHT: (C)2012,JPO&INPIT |
