<p>A memory element includes a MOS transistor having a drain, a source and a body region covered by an insulated gate, wherein the thickness of the body region is divided into two distinct regions separated by a portion of an insulating layer extending parallel to the plane of the gate.</p>
申请公布号
EP2419902(A1)
申请公布日期
2012.02.22
申请号
EP20100723670
申请日期
2010.04.13
申请人
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE CNRS;UNIVERSIDAD DE GRANADA
发明人
CRISTOLOVEANU, SORIN, IOAN;RODRIGUEZ, NOEL;GAMIZ, FRANCISCO
