发明名称 Data processing apparatus and method
摘要 A data processing apparatus maps symbols received from a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols into an output symbol stream. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are de-interleaved from the sub-carrier signals into the output symbol stream. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit. The linear feedback shift register has eight register stages and the permutation code forms, with an additional bit, a nine bit address. The address generator includes an offset generator operable to add an offset to the formed nine bit address, thereby providing an improvement in de-interleaving the data symbols for a 0.5K operating mode of an OFDM modulated system such as a Digital Video Broadcasting (DVB) standard such as DVB-Terrestrial2 (DVB-T2). This is because there is a reduced likelihood that successive data bits which are close in order in an input data stream are mapped onto the same sub-carrier of an OFDM symbol.
申请公布号 EP2421167(A2) 申请公布日期 2012.02.22
申请号 EP20110189838 申请日期 2008.10.24
申请人 SONY CORPORATION 发明人 TAYLOR, MATTHEW PAUL ATHOL;ATUNGSIRI, SAMUEL ASANBENG;WILSON, JOHN NICHOLAS
分类号 H03M13/27;H04L1/00;H04L5/00;H04L27/00;H04L27/26 主分类号 H03M13/27
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