发明名称 SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To reduce delay by amount equivalent to group delay time of a filter and to accelerate processing in separating a noise component from a measuring signal. SOLUTION: In this signal processor, an adder 11 outputs a deviation signal obtained by subtracting an output signal outputted to a D/A converting part side from an input signal inputted from an A/D converting part, an amplifier 12 outputs a deviation amplification signal obtained by performing amplification processing of the deviation signal, a filtering part 13 performs frequency selection processing of the deviation amplification signal, adds this processed result to the preceding output signal and outputs it to the D/A converting part side, and a signal feedbacking part 14 extracts an output signal outputted to the D/A converting part side from the part 13 and makes it feedback to the adder 11 in a closed loop circuit 101 to 10n which processes a measuring signal between the A/D converting part 2 and the D/A converting part 4.
申请公布号 JP2000285360(A) 申请公布日期 2000.10.13
申请号 JP19990092794 申请日期 1999.03.31
申请人 ANRITSU CORP 发明人 RONTE SUNAO;YAMAGUCHI SHIGEMI
分类号 G01G23/37;G08C25/00;H03H17/02;(IPC1-7):G08C25/00 主分类号 G01G23/37
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