| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of parts, and to reduce manufacturing cost in digital equipment equipped with a CPU and programmable hardware such as an FPGA(field programmable gate array), and to simplify the management of design information, and to integrate development environments in develop ment. SOLUTION: A CPU 26 and a software code 23 and a hardware (FPGA) code 24 which are necessary for programmable hardware such as an FPGA 28 at the time of operation are allowed to coexist and preserved on the same memory area of digital equipment. In developing this digital equipment, a top/ down design method is adopted, and the function of the digital equipment decided in the initial stage (upstream) of development is designed without any discrimination of software or hardware in the upstream, and the software code 23 for the CPU 26 and the hardware code 24 for the FPGA are generated so as to be merged (integrated) finally in a downstream.
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