发明名称 CIRCUIT FOR CONTROLLING DATA TRANSMISSION
摘要 PURPOSE: A circuit for controlling a data transmission is provided to control a wait inter-exclusively upon transmitting data between two CPUs driven individually. CONSTITUTION: In a circuit for controlling a data transmission, the first signal comparing section(310) compares the write signal(WR_a) of the first CPU with the read signal(RD_b) of the second CPU to determine whether an error is generated or not upon transmitting data from the first CPU to the second CPU. The second signal comparing section(320) compares the write signal(WR_b) of the second CPU with the read signal(RD_a) of the first CPU to determine whether an error is generated or not upon transmitting data from the second CPU to the first CPU. A signal operation section(330) outputs a ready signal for controlling the continuous writing and reading operations in the first and second CPUs by operating the output signals of the first and second signal comparing sections.
申请公布号 KR20010009384(A) 申请公布日期 2001.02.05
申请号 KR19990027735 申请日期 1999.07.09
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 JANG, BYEONG HWA;KO, HAENG SEOK
分类号 H04L29/02;(IPC1-7):H04L29/02 主分类号 H04L29/02
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