发明名称 |
Array and control method for flash based FPGA cell |
摘要 |
A push-pull non-volatile memory array includes memory cells with an n-channel non-volatile pull-down transistor in series with a p-channel volatile pull-up transistor. A non-volatile transistor row line is associated with each row of the array and is coupled to the control gates of each n-channel non-volatile pull-down transistor in the row. A volatile transistor row line is associated with each row of the array and is coupled to the control gates of each p-channel volatile pull-up transistor in the row with which it is associated. A column line is associated with each column in the array and is coupled to the source of each p-channel volatile pull-up transistor in the column with which it is associated. |
申请公布号 |
US8120955(B2) |
申请公布日期 |
2012.02.21 |
申请号 |
US20090371483 |
申请日期 |
2009.02.13 |
申请人 |
WANG ZHIGANG;DHAOUI FETHI;MCCOLLUM JOHN;BELLIPPADY VIDYADHARA;ACTEL CORPORATION |
发明人 |
WANG ZHIGANG;DHAOUI FETHI;MCCOLLUM JOHN;BELLIPPADY VIDYADHARA |
分类号 |
G11C11/34 |
主分类号 |
G11C11/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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