发明名称 Package with improved connection of a decoupling capacitor
摘要 A package (216) for electrically connecting an integrated circuit (212) to a printed circuit board (214) includes a mount array (219) and a substrate body (216A). The mount array (219) is electrically connected to the integrated circuit (212). The mount array (219) includes a plurality of positive terminal mounts (342), a plurality of negative terminal mounts (344), and a plurality of signal mounts (346). The substrate body (216A) includes a first conductive layer (220a), a second conductive layer (220b), and an insulating layer (222a) that is positioned between the first conductive layer (220a) and the second conductive layer (220b). The first conductive layer (220a) includes (i) a terminal portion (350) that is connected one of the terminal mounts (342) (344), and (ii) a signal portion (352) that is connected to the signal mounts (346). Further, the second conductive layer (220b) is directly connected to the other of the terminal mounts (344) (342). Additionally, the package (216) can include a capacitor (238) having a positive capacitor pad (556) and a negative capacitor pad (554). The electrical path of the capacitor (238) to the mount array (219) in the designs provided herein is relatively short, has relatively low impedance, and has a relatively low loop inductance.
申请公布号 US8120162(B2) 申请公布日期 2012.02.21
申请号 US20070904752 申请日期 2007.09.28
申请人 SHAH JITESH;INTEGRATED DEVICE TECHNOLOGY, INC. 发明人 SHAH JITESH
分类号 H01L29/00 主分类号 H01L29/00
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