发明名称 Method for fabricating semiconductor device with damascene bit line
摘要 A method for fabricating a semiconductor device includes forming an interlayer dielectric layer over a substrate; forming a dual storage node contact plug to be buried in the interlayer dielectric layer, forming a first damascene pattern to isolate the dual storage node contact plug, forming a protective layer pattern inside the first damascene pattern, etching the interlayer dielectric layer to form a second damascene pattern to be coupled to the first damascene pattern, and forming bit lines inside the first and second damascene patterns.
申请公布号 US8119512(B1) 申请公布日期 2012.02.21
申请号 US20100980902 申请日期 2010.12.29
申请人 LEE CHANG-GOO;HYNIX SEMICONDUCTOR INC. 发明人 LEE CHANG-GOO
分类号 H01L21/44 主分类号 H01L21/44
代理机构 代理人
主权项
地址