发明名称 Digital to frequency synthesis using flying-adder with dithered command input
摘要 To make Flying-Adder architecture even more powerful, a new concept, time-average-frequency, is incorporated into the clock generation circuitry. This is a fundamental breakthrough since it attacks the clock generation problem from its root: how is the clock signal used in real systems? By investigating from this direction, a much more powerful architecture, fixed-VCO-Flying-Adder architecture, is created. Furthermore, based on fixed-VCO-Flying-Adder frequency synthesizer and time-average-frequency, a new type of component called Digital-to-Frequency Converter (DFC) is born.
申请公布号 US8120389(B2) 申请公布日期 2012.02.21
申请号 US20090536181 申请日期 2009.08.05
申请人 XIU LIMING;TEXAS INSTRUMENTS INCORPORATED 发明人 XIU LIMING
分类号 H03B21/00;H03L7/06 主分类号 H03B21/00
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