发明名称 Impedance-based power supply switch optimization
摘要 In one embodiment, a power gated circuit block includes power switches that couple at least one of the power supply grids within the block to the global power supply grids of the integrated circuit. The power switches receive an enable that indicates whether or not the power gated block is enabled or disabled. If the power gated block is enabled, the power switches are turned on and electrically connect the global power supply grid with the internal (or local) power supply grid; otherwise the power switches electrically isolate the local power supply grid from the global power supply grid. The power switches are physically distributed over an area occupied by the power gated block, including near an edge of the area. The number of power switches near the edge is greater than the number of switches included at other locations in the area to provide a worst case impedance experienced at points throughout the area that is approximately equal.
申请公布号 US8120208(B2) 申请公布日期 2012.02.21
申请号 US20090484692 申请日期 2009.06.15
申请人 TAKAYANAGI TOSHINARI;SUZUKI SHINGO;APPLE INC. 发明人 TAKAYANAGI TOSHINARI;SUZUKI SHINGO
分类号 G05F1/10 主分类号 G05F1/10
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