DISAGGREGATED SEMICONDUCTOR CHIP ASSEMBLY AND PACKAGING TECHNIQUE

摘要

A semiconductor package is disclosed. The package comprises a substrate having terminals for external connections and respective first and second semiconductor chips. The first semiconductor chip has pads coupled to respective ones of the terminals and includes a metal layer. The second semiconductor chip is attached to the first semiconductor chip and has first contacts electrically coupled to respective ones of the pads through the metal layer. The second semiconductor chip overlying an area of the first semiconductor chip that is less than a surface area occupied by the pads.