发明名称 Circuit and System of Aggregated Area Anti-Fuse in CMOS Processes
摘要 Gate oxide breakdown anti-fuse suffers notorious soft breakdown that reduces yield and reliability. This invention discloses circuit and system to enhance electrical field by blocking LDD so that the electrical field is higher and more focused near the drain junction, to make electrical field in the channel more uniform by creating slight conductive or conductive in part or all of the channel, or to neutralize excess carriers piled up in the oxide by applying alternative polarity pulses. The embodiments can be applied in part, all, or any combinations, depending on needs. This invention can be embodied as a 2 T anti-fuse cell having an access and a program MOS with drain area in the program MOS, or 1.5 T anti-fuse cell without any drain in the program MOS. Similarly this invention can also be embodied as a 1 T anti-fuse cell having a portion of the channel made conductive or slightly conductive to merge the access and program MOS into one device with drain area, or 0.5 T anti-fuse cell without any drain.
申请公布号 US2012039107(A1) 申请公布日期 2012.02.16
申请号 US201113072783 申请日期 2011.03.28
申请人 CHUNG SHINE C. 发明人 CHUNG SHINE C.
分类号 G11C17/12 主分类号 G11C17/12
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