发明名称 Method and Apparatus for Optimizing Clock Speed and Power Dissipation in Multicore Architectures
摘要 A multicore processor provides for local power control at each of the cores which is used to lower the maximum operating frequency of cores by any amount above of the maximum operating frequency of the slowest core. This power savings is then used to increase the maximum operating frequency of the frequency balanced cores within a power constraint.
申请公布号 US2012042176(A1) 申请公布日期 2012.02.16
申请号 US20100857167 申请日期 2010.08.16
申请人 KIM NAM SUNG 发明人 KIM NAM SUNG
分类号 G06F1/26;G06F1/12;G06F1/32 主分类号 G06F1/26
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