| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a digital/analog converter, a data driver and a display device which suppress increase in the number of switches fabricated within a CMOS and gate width to deter an increase of area. <P>SOLUTION: In a digital/analog converter, a reference voltage aggregate 80 includes first and second reference voltage groups 81 and 82. A decoder 100 includes first and second sub-decoder parts 10 and 20 to which higher-order (m-n)-bit signals in m-bit digital signals are input in common, and third and fourth sub-decoder parts 30 and 40 to which lower-order n-bit signals in the m-bit digital signals are input in common. The first and third sub-decoder parts 10 and 30 are composed of first conductive type transistors, and the second and fourth sub-decoder parts 20 and 40 are composed of second conductive type transistors. An amplifier circuit 50 averages voltages received at its input with a predetermined weighting and outputs the weighted averaged voltage as an analog signal corresponding to the m-bit digital signal, from an output terminal 51. <P>COPYRIGHT: (C)2012,JPO&INPIT |
