发明名称 |
Latching serial data in an ink jet print head |
摘要 |
A print data loading circuit receives N bits of serial data on a serial input data line, and provides the input data to a data bus in an addressing circuit for addressing one or more image-forming elements in a printing device. The data loading circuit includes an N-bit serial shift register having N number of serially-coupled single-bit storage registers. The data loading circuit also includes N-1 number of data latches, each having a data input coupled to a data output of a corresponding one of the single-bit storage registers. The data outputs of the data latches are coupled to N-1 number of selection lines that are coupled to the data bus. Each data latch has a clock input that is coupled to the data output of the Nth storage register. Based on this configuration, a bit provided at the Nth-register data output acts as a load trigger bit to cause the other data bits in the other single-bit storage registers to be loaded into the N-1 number of data latches. By providing the trigger bit from the Nth register of the shift register, the present invention eliminates the need for a second clock input to latch the print data into the data latches. Eliminating a second clock input reduces print head costs and potential EMI problems.
|
申请公布号 |
US2002109739(A1) |
申请公布日期 |
2002.08.15 |
申请号 |
US20010780555 |
申请日期 |
2001.02.09 |
申请人 |
EDELEN JOHN GLENN;ROWE KRISTI MAGGARD |
发明人 |
EDELEN JOHN GLENN;ROWE KRISTI MAGGARD |
分类号 |
B41J2/05;(IPC1-7):B41J29/38 |
主分类号 |
B41J2/05 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|