| 摘要 |
A fabrication method of integrating a power transistor and a schottky diode on a monolithic substrate is provided. Firstly, a substrate of a first conductive type is provided. Then, at least a polysilicon gate and a second polysilicon structure are formed on the substrate. At least a portion of the second polysilicon structure is located on an upper surface of the substrate. Thereafter, a body of a second conductive type and a source region of the first conductive type are formed between the polysilicon gate and the second polysilicon structure. Then, an interlayer dielectric film is formed on the polysilicon gate to define a source contact window, but the second polysilicon structure is still exposed. Afterward, a portion of the second polysilicon structure is removed to form a schottky contact window to expose the substrate. |
