| 摘要 |
<P>PROBLEM TO BE SOLVED: To support sub-word parallel execution based on complex conditions. <P>SOLUTION: General purpose flags (ACFs) are defined and encoded utilizing a hierarchy. Each added bit provides a superset of the previous functionality. With condition combination, a sequential series of conditional branches based on complex conditions can be avoided and the complex conditions can then be used for conditional execution. Conditional operation parallelism can be widely varied, for example, from mono-processing to octal-processing in VLIW execution, and across an array of processing elements (PEs) by varying the number of the flags. The multiple PEs can generate condition information at the same time by enabling specification of the conditional execution in one processor based on condition generated in a different processor. Each processor in the multiple processor arrays can independently have different units conditionally operate based on the ACFs. <P>COPYRIGHT: (C)2012,JPO&INPIT |
