A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlaying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration customizable RAM blocks; a ROM block with customizable contents; and a microprocessor with customizable I/O for configuring and testing the array, where the customizations are all done on a single via layer.
申请公布号
AT544237(T)
申请公布日期
2012.02.15
申请号
AT20050775248T
申请日期
2005.07.25
申请人
EASIC CORPORATION;KAPEL, ALON;GRIGORE, GEORGE CATALIN
发明人
OR-BACH, ZVI;AVRAM, PETRICA;IACOBUT, ROMEO;APOSTOL, ADRIAN;WURMAN, ZE'EV;LEVENTHAL, ADAM;ZEMAN, RICHARD;KAPEL, ALON;GRIGORE, GEORGE