发明名称 METHOD FOR FORMING GATE OF SEMICONDUCTOR DEVICE
摘要 A method for forming a gate of a semiconductor device is provided to reduce gate depletion and to control an out-diffusion of p-type impurity from a poly silicon layer to a metal layer by forming a silicon layer where the n-type impurity is ion-implanted on the metal layer of a PMOS forming region as a diffusion preventing layer. A semiconductor(200) where a P-well(202a) and an N-well(202b) are formed is provided. A gate dielectric(210) is formed on the semiconductor substrate. A non-doped poly silicon layer is formed on the gate dielectric. N-type impurities are selectively ion-implanted into the non-doped poly silicon layer part formed on the P-well. P-type impurities are selectively ion-implanted into the non-doped poly silicon layer part formed on the N-well. A metal layer(230) and a silicon layer(235) are formed in turn on the resultant structure. N-type impurity is selectively ion-implanted into the silicon layer part formed on the N-well. The silicon layer, the metal layer, the poly silicon layer, and the gate dielectric are etched in turn.
申请公布号 KR20070028069(A) 申请公布日期 2007.03.12
申请号 KR20050083242 申请日期 2005.09.07
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JEON, YU JIN
分类号 H01L21/8238 主分类号 H01L21/8238
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