发明名称 |
Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions |
摘要 |
A circuit including a memory and an error correction code circuit. The memory including (i) a plurality of data storage cells and (ii) at least one reserved cell configured to store status information identifying a status of one or more of the plurality of data storage cells. Each of the data storage cells is configured to store a plurality of data bits. Each of the at least one reserved cell includes a multi-bit cell configured to store a lower density of information than each of the data storage cells. The error correction code circuit is configured to indicate, in a data stream formed from the memory, positions of data from the data storage cells for which status information is stored. |
申请公布号 |
US8117510(B1) |
申请公布日期 |
2012.02.14 |
申请号 |
US20100916874 |
申请日期 |
2010.11.01 |
申请人 |
SUTARDJA PANTAS;WU ZINING;MARVELL INTERNATIONAL LTD. |
发明人 |
SUTARDJA PANTAS;WU ZINING |
分类号 |
G11C29/00;G11C7/00;H03M13/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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