发明名称 System and method for pre-patterned embedded chip build-up
摘要 A system and method for forming an embedded chip package is disclosed. The embedded chip package includes a first chip portion having a plurality of pre-patterned re-distribution layers joined together to form a pre-patterned lamination stack, with the pre-patterned lamination stack having a die opening extending therethrough. The embedded chip package also includes a die positioned in the die opening and a second chip portion having at least one uncut re-distribution layer, with the second chip portion affixed to each of the first chip portion and the die and being patterned to be electrically connected to both of the first chip portion and the die.
申请公布号 US8114708(B2) 申请公布日期 2012.02.14
申请号 US20080241236 申请日期 2008.09.30
申请人 MCCONNELEE PAUL;CUNNINGHAM DONALD;DUROCHER KEVIN;GENERAL ELECTRIC COMPANY 发明人 MCCONNELEE PAUL;CUNNINGHAM DONALD;DUROCHER KEVIN
分类号 H01L23/48 主分类号 H01L23/48
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