发明名称 Computation of a multiplication operation with an electronic circuit and method
摘要 A computing method and circuit for computing a modular operation with at least one operand having a binary representation. Iteratively for each bit of this operand, doubling the value of an intermediate result stored in a first memory element by shifting the bits of the intermediate result towards the most significant bit and, while the most significant bit of the intermediate result is one, updating this intermediate result by subtracting a modulus stored in a second memory element.
申请公布号 US8117251(B2) 申请公布日期 2012.02.14
申请号 US20070786767 申请日期 2007.04.11
申请人 BERTONI GUIDO MARCO;FRAGNETO PASQUALINA;MARSH ANDREW RICHARD;PELOSI GERARDO;RAVASIO MORIS;STMICROELECTRONICS S.R.L. 发明人 BERTONI GUIDO MARCO;FRAGNETO PASQUALINA;MARSH ANDREW RICHARD;PELOSI GERARDO;RAVASIO MORIS
分类号 G06F7/38 主分类号 G06F7/38
代理机构 代理人
主权项
地址