发明名称 |
Profile of flash memory cells |
摘要 |
A semiconductor structure includes a semiconductor substrate; a tunneling layer on the semiconductor substrate; a source region adjacent the tunneling layer; and a floating gate on the tunneling layer. The floating gate comprises a first edge having an upper portion and a lower portion, wherein the lower portion is recessed from the upper portion. The semiconductor structure further includes a blocking layer on the floating gate, wherein the blocking layer has a first edge facing a same direction as the first edge of the floating gate. |
申请公布号 |
US8114740(B2) |
申请公布日期 |
2012.02.14 |
申请号 |
US201113045955 |
申请日期 |
2011.03.11 |
申请人 |
LIU SHIH-CHANG;CHANG CHU-WEI;LO CHI-HSIN;TSAI CHIA-SHIUNG;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD |
发明人 |
LIU SHIH-CHANG;CHANG CHU-WEI;LO CHI-HSIN;TSAI CHIA-SHIUNG |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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