| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of extracting a hot spot in layout designing/verification of a semiconductor device in which it is feasible to appropriately extend a process margin and directly relate a result of extracting hot spots to an improvement in an yield of production steps. SOLUTION: A hot spot is extracted using an extraction standard regarding, in addition to a film thickness direction, the direction orthogonal to the film thickness direction. For example, steps are provided of: partitioning an analysis-target region into a grid pattern based on layout data of a semiconductor device; computing a film thickness and a level difference for each partitioned unit grid by means of simulation; and determining for every unit grid whether or not the unit grid applies to the hot spot, based on the result of the simulation and using the extraction standard regarding a film thickness direction and the extraction standard regarding the direction orthogonal to the film thickness direction. COPYRIGHT: (C)2008,JPO&INPIT |
