发明名称 SEMICONDUCTOR PACKAGE AND METHOD OF TESTING SAME
摘要 A packaged integrated circuit includes a substrate having a wire layout pattern and a solder mask layer. An integrated circuit attached to a surface of the substrate is electrically connected to the wire layout pattern. An encapsulation material covers at least the integrated circuit and the solder mask layer. One or more crack seal rings are disposed on the solder mask surface. The crack seal rings are copper traces with terminals that allow current to be applied to the traces. A broken trace (open circuit condition) is indicative of a crack in the package. Thus, electrical testing is performed to detect physical defects.
申请公布号 US2012032167(A1) 申请公布日期 2012.02.09
申请号 US20100851527 申请日期 2010.08.05
申请人 LOW BOON YEW;LAU TECK BENG;MANIKAM VEMAL RAJA;FREESCALE SEMICONDUCTOR, INC 发明人 LOW BOON YEW;LAU TECK BENG;MANIKAM VEMAL RAJA
分类号 H01L23/498;H01L21/60;H01L21/768;H01L23/48;H01L23/488 主分类号 H01L23/498
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