发明名称 |
Multi-Layer Circuit Assembly And Process For Preparing The Same |
摘要 |
A process for fabricating a multi-layer circuit assembly is provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; (c) removing the dielectric coating in a predetermined pattern to expose sections of the substrate; (d) applying a layer of metal to all surfaces to form metallized vias through and/or to the electrically conductive core; (e) applying a resist to the metal layer to form a photosensitive layer thereon; (f) imaging resist in predetermined locations; (g) developing resist to uncover selected areas of the metal layer; and (h) etching uncovered areas of metal to form an electrical circuit pattern connected by the metallized vias. |
申请公布号 |
US2012031655(A1) |
申请公布日期 |
2012.02.09 |
申请号 |
US201113275808 |
申请日期 |
2011.10.18 |
申请人 |
OLSON KEVIN C.;WANG ALAN G.;PPG INDUSTRIES OHIO, INC. |
发明人 |
OLSON KEVIN C.;WANG ALAN G. |
分类号 |
H05K1/09;H05K1/02;H05K3/00 |
主分类号 |
H05K1/09 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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