| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an overvoltage protection circuit that can suppress increase of resistance of a passage through which an ESD pulse flows, has an increased EOS breakdown voltage, and suppress increase of the manufacturing cost. <P>SOLUTION: An overvoltage protection circuit has: a protecting unit 11 comprising an enhancement type NMOS transistor M1 which forms a discharge passage for a short-time ESD pulse when the ESD pulse is applied between a signal terminal 1 and a ground terminal 2; and a controller 12 for forcedly turning off a transistor M1 by connecting a gate and a back gate of the transistor M1 to the ground terminal 2 when a positive-polarity EOS voltage is applied to the signal terminal 1, and forcedly turning off the transistor M1 by connecting the gate and the back gate of the transistor M1 to the signal terminal 1 when a negative-polarity EOS voltage is applied to the signal terminal 1. <P>COPYRIGHT: (C)2012,JPO&INPIT |
