发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method and a semiconductor device in which metal silicide layers of approximately same level of quantity are formed in a memory cell region and a peripheral circuit region, respectively. <P>SOLUTION: The semiconductor device comprises a semiconductor substrate 1, a memory cell region and a peripheral circuit region provided on the semiconductor substrate 1, a gate electrode having a gate insulator 7 and a conductive layer 10 with a metal silicide upper portion on the memory cell region, and a gate electrode having the gate insulator 7 and the conductive layer 10 with a metal silicide upper portion on the peripheral circuit region. A metal silicide layer 10b of the conductive layer 10 of the gate electrode on the peripheral circuit region has a plurality of recesses on a top face and a plurality of salients on an under surface corresponding to the plurality of recesses. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012028434(A) 申请公布日期 2012.02.09
申请号 JP20100163781 申请日期 2010.07.21
申请人 TOSHIBA CORP 发明人 KOBAYASHI AKIKO;KAJIMOTO SANETOSHI
分类号 H01L27/115;H01L21/28;H01L21/8247;H01L27/10;H01L29/41;H01L29/423;H01L29/49;H01L29/788;H01L29/792 主分类号 H01L27/115
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