发明名称 VARIATION-TOLERANT WORD-LINE UNDER-DRIVE SCHEME FOR RANDOM ACCESS MEMORY
摘要 A Random Access Memory (RAM) is provided. The RAM includes a plurality of word-line drivers, at least a first tracking transistor and a second tracking transistor. Each word-line driver has an input node receiving a decoding signal, a power node receiving an operation voltage and a driving node driving a word-line. In an embodiment, the first tracking transistor has two channel terminal nodes respectively coupled to the driving node of one of the word-line driver and a channel terminal node of the second tracking transistor; wherein the first tracking transistor has electronic characteristics tracking those of a driving transistor of word-line driver, and the second tracking transistor has electronic characteristics tracking those of pass-gate transistor(s) in each cell of the RAM.
申请公布号 US2012033522(A1) 申请公布日期 2012.02.09
申请号 US20100852759 申请日期 2010.08.09
申请人 CHUANG CHING-TE;LIN YI-WEI;CHEN CHIA-CHENG;SHIH WEI-CHIANG;NATIONAL CHIAO TUNG UNIVERSITY;FARADAY TECHNOLOGY CORPORATION 发明人 CHUANG CHING-TE;LIN YI-WEI;CHEN CHIA-CHENG;SHIH WEI-CHIANG
分类号 G11C8/08 主分类号 G11C8/08
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