发明名称 |
METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION DIFFUSION |
摘要 |
A transistor which includes halo regions disposed in a substrate adjacent to opposing sides of the gate. The halo regions have upper and lower regions. The upper region is a crystalline region with excess vacancies and the lower region is an amorphous region. Source/drain diffusion regions are disposed in the halo regions. The source/drain diffusion regions overlap the upper and lower halo regions. This architecture offers the minimal extension resistance as well as minimum lateral diffusion for better CMOS device scaling. |
申请公布号 |
US2012034745(A1) |
申请公布日期 |
2012.02.09 |
申请号 |
US201113277197 |
申请日期 |
2011.10.19 |
申请人 |
COLOMBEAU BENJAMIN;YEONG SAI HOOI;BENISTANT FRANCIS;INDAJANG BANGUN;CHAN LAP;GLOBALFOUNDRIES SINGAPORE PTE. LTD. |
发明人 |
COLOMBEAU BENJAMIN;YEONG SAI HOOI;BENISTANT FRANCIS;INDAJANG BANGUN;CHAN LAP |
分类号 |
H01L21/336;H01L21/265 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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