SEMICONDUCTOR MEMORY DEVICE

摘要

A semiconductor memory device is provided to control tRCD(RAS to CAS Delay) independently of an address inputted during a test operation of a semiconductor memory device using address double pumping. A column address strobe pulse generation unit(400) generates a column address strobe pulse in response to a column command signal. A row address strobe pulse generation unit(440) generates a row address strobe pulse by receiving the column command signal or an active command signal in response to a test mode signal. The column address strobe pulse generation unit comprises a column pulse generation part(410) and a column address strobe pulse output part(420). The column pulse generation part generates a first and a second column pulse in response to the column command signal. The column address strobe pulse output part outputs the second column pulse as the column address strobe pulse in response to a power-up signal.