MRAM Device and Integration Techniques Compatible with Logic Integration

摘要

A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.