发明名称 LATENCY CONTROL CIRCUIT AND OPERATING METHOD MHEREOF
摘要 PURPOSE: A latency control circuit and an operating method thereof are provided to minimize power consumption for reflecting latency information to an input signal by a shifting operation of a clock synchronizing unit at an input signal transmission point. CONSTITUTION: A plurality of clock synchronizing units(310) shift an input signal. A selection output unit(320) selects an output signal corresponding to latency information. A clock supply unit(330) supplies a clock signal to the plurality of clock synchronizing unit and includes a plurality of clock allocating units. The plurality of clock allocating units allocate the clock signal to the corresponding clock synchronizing unit.
申请公布号 KR20120012119(A) 申请公布日期 2012.02.09
申请号 KR20100074061 申请日期 2010.07.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SONG, CHOUNG KI
分类号 G11C7/20;G11C5/14;G11C7/10;G11C7/22 主分类号 G11C7/20
代理机构 代理人
主权项
地址