发明名称 Memory data reading and writing technique
摘要 A novel circuit for reading data in solid state memory cells is presented. It can be used for any type of memory cell array but more specifically it is particularly suited for volatile memories like SRAM and DRAM. It is based on sensing the current in the ground line of the memory cell when the data is being read. This eliminates the need for detecting large voltage swings on the bit line resulting in large delays or complex sense amplification circuits. It offers the advantages of being very small in silicon area, very fast and very efficient. The read and write static noise margins are increased with respect to conventional techniques. The current can be amplified and converted to a voltage signal by a transimpedance amplifier ac coupled to a sense resistor on the ground line. The signal can be successively latched. The same technique can be used to detect when the writing of a cell has been successfully carried out.
申请公布号 US2012033509(A1) 申请公布日期 2012.02.09
申请号 US20100927674 申请日期 2010.11.22
申请人 MENEGOLI PAOLO;MARINO FABIO ALESSIO 发明人 MENEGOLI PAOLO;MARINO FABIO ALESSIO
分类号 G11C7/00;G11C8/08 主分类号 G11C7/00
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