发明名称 SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
摘要 PURPOSE: A semiconductor memory device and an operating method thereof are provided to perform a test operation by receiving an address signal of the minimum number of bits in a test mode. CONSTITUTION: An address buffering unit(310) buffers a bank address signal and a cell address signal and outputs the buffered signals. A clock buffering unit(320) outputs an internal clock signal. A first address latching unit(330) latches an output signal of the address buffering unit. A second address latching unit(340) latches an output signal of the address selection output unit. A plurality of address shifting units successively receive an address signal and shift the address signal. A plurality of address selection output units(350) output the address signal to the plurality of address shifting units. The plurality of address selection output units outputs the output signal of a prior address shifting unit to a following address shifting unit in a test mode.
申请公布号 KR20120012140(A) 申请公布日期 2012.02.09
申请号 KR20100074106 申请日期 2010.07.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SONG, CHOUNG KI
分类号 G11C29/18;G11C7/10;G11C8/04 主分类号 G11C29/18
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