Fetch width predictor

摘要

Various techniques for predicting instruction fetch widths. In one embodiment, a fetch prediction unit in a processor is configured to generate a fetch width that specifies a number of bits to be retrieved in a subsequent fetch from an instruction cache. The fetch prediction unit may also generate a fetch prediction that includes the fetch width in response to a current fetch request. A number of bits corresponding to the fetch width may be fetched from the instruction cache. The fetch width may correspond to a location of a predicted-taken control transfer instruction. This fetch width prediction may lead to power savings in instruction cache accesses.

主权项

1. A method, comprising:
predicting, by a processing unit, a fetch width that specifies a first number of bits to be retrieved from a cache line in a fetch from an instruction cache; and fetching only the first number of bits from the cache line in response to a fetch request corresponding to the cache line; wherein the first number of bits is less than a maximum number of bits that the instruction cache is configured to retrieve from the cache line in response to fetch requests.