发明名称
摘要 <p>In an information apparatus including a plurality of processing circuits connected to a ring bus, when processing speeds (throughput) of processing circuits are different or an amount of data in the processing circuit is increased or decreased, deadlock can occur or the throughput can be decreased in the ring bus. In order to solve this problem, a stall state of other processing unit is detected from a packet acquired from the ring bus and a packet is restricted from being newly generated by the processing circuit nor transmitted therefrom when other processing unit is in the stall state.</p>
申请公布号 JP4869369(B2) 申请公布日期 2012.02.08
申请号 JP20090060687 申请日期 2009.03.13
申请人 发明人
分类号 G06F13/36 主分类号 G06F13/36
代理机构 代理人
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