发明名称 Method of manufacturing semiconductor wafer by forming a strain relaxation SiGe layer on an insulating layer of SOI wafer
摘要 A semiconductor wafer is produced at a step of forming a lattice relaxation or a partly lattice-relaxed strain relaxation SiGe layer on an insulating layer in a SOI wafer comprising an insulating layer and a SOI layer, wherein at least an upper layer side portion of the SiGe layer is formed on the SOI layer at a gradient of Ge concentration gradually decreasing toward the surface and then subjected to a heat treatment in an oxidizing atmosphere.
申请公布号 US8110486(B2) 申请公布日期 2012.02.07
申请号 US20070649943 申请日期 2007.01.05
申请人 MATSUMOTO KOJI;HORA TOMOYUKI;ENDO AKIHIKO;MORITA ETSUROU;NINOMIYA MASAHARU;SUMCO CORPORATION 发明人 MATSUMOTO KOJI;HORA TOMOYUKI;ENDO AKIHIKO;MORITA ETSUROU;NINOMIYA MASAHARU
分类号 H01L21/20 主分类号 H01L21/20
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