发明名称 Fabrication of germanium nanowire transistors
摘要 In general, in one aspect, a method includes using the Germanium nanowire as building block for high performance logic, memory and low dimensional quantum effect devices. The Germanium nanowire channel and the SiGe anchoring regions are formed simultaneously through preferential Si oxidation of epitaxial Silicon Germanium epi layer. The placement of the germanium nanowires is accomplished using a Si fin as a template and the germanium nanowire is held on Si substrate through SiGe anchors created by masking the two ends of the fins. High dielectric constant gate oxide and work function metals wrap around the Germanium nanowire for gate-all-around electrostatic channel on/off control, while the Germanium nanowire provides high carrier mobility in the transistor channel region. The germanium nanowire transistors enable high performance, low voltage (low power consumption) operation of logic and memory devices.
申请公布号 US8110458(B2) 申请公布日期 2012.02.07
申请号 US20100762585 申请日期 2010.04.19
申请人 JIN BEEN-YIH;KAVALIEROS JACK T.;METZ MATTHEW V.;RADOSAVLIEVIC MARKO;CHAU ROBERT S.;INTEL CORPORATION 发明人 JIN BEEN-YIH;KAVALIEROS JACK T.;METZ MATTHEW V.;RADOSAVLIEVIC MARKO;CHAU ROBERT S.
分类号 H01L21/336 主分类号 H01L21/336
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