| 摘要 |
A wafer level package includes a chip, a removable resin layer, a molding material, a dielectric layer, redistribution lines and a solder resist. The removable resin layer is formed to surround side surfaces and a lower surface of the chip. The molding material is formed on the lower surface of the removable resin layer. The dielectric layer is formed over the removable resin layer including the chip and having via holes to expose portions of the chip. The redistribution lines are formed on the dielectric layer including insides of the via holes to be connected to the chip. The solder resist layer is formed on the dielectric layer to expose portions of the redistribution lines. |
