WLED DRIVER AND DRIVE CONTROL METHOD

摘要

A WLED driver and a drive control method. The WLED driver includes 2N2 switches, and each CS module includes 2N switches, where one end of each of N switches in the 2N switches is connected to an output end of an error amplifier, another end of each of the N switches is connected to a gate of each of N NMOS transistors, one end of each of remaining N switches is connected to a negative input end of the error amplifier, and another end of each of the remaining N switches is connected to a positive input end of each of N feedback resistors. After a control circuit generates a clock control signal group Φgroup. the control circuit controls switching actions of the 2N2 switches on a time-division basis according to the clock control signal group Φgroup.

主权项

1. A White Light Emitting Diode (WLED) driver, comprising:
N channels, wherein N is a positive integer that is greater than 1, and each channel comprises a current sink (CS) module configured to drive a WLED string, wherein each CS module comprises an error amplifier (EA), an n-type metal-oxide-semiconductor (NMOS) transistor, and a feedback resistor; at least 2N2 switches, wherein each CS module comprises 2N switches, the 2N2 switches constitute a switch matrix SG=Sg(i, j) and a switch matrix SFB=Sfb(i, j), and wherein Sg(i, j) is a switch between an output end of an EA in an ith CS module and a gate of an NMOS transistor in a jth CS module, Sfb(i, j) is a switch between a negative input end of the EA in the ith CS module and a positive input end of a feedback resistor in the jth CS module, and both i and j are positive integers that are less than or equal to N; a boost converter configured to regulate an output voltage of the WLED driver according to a maximum quantity of WLEDs in a WLED string corresponding to any channel; wherein one end of each of N switches in the 2N switches comprised in the CS module is connected to an output end of the error amplifier, another end of each of the N switches is connected to a gate of each of N NMOS transistors, one end of each of remaining N switches is connected to a negative input end of the error amplifier, another end of each of the remaining N switches is connected to a positive input end of each of N feedback resistors, and the CS module is configured to determine an intensity of a current flowing through the WLED string corresponding to the channel; and a control circuit configured to generate a clock signal group Φgroup and control switching actions of the 2N2 switches on a time-division basis according to the clock control signal group Φgroup, so that in a clock period T, an input offset voltage of the error amplifier is evenly applied on each channel in sequence on a time-division basis, wherein the clock signal group Φgroup=(Φ1, Φ2, . . . , ΦN), the clock control signal group Φgroup comprises m N clock signals Φ, the N clock signals Φ are non-overlapping N-phase clock signals Φ of a same source, a clock signal Φi+j has a delay of j×T/N in comparison with Φi, and T is a clock period of each phase clock.