发明名称 Apparatus including memory channel control circuit and related methods for relaying commands to logical units
摘要 Memory system controllers can include a switch and non-volatile memory control circuitry coupled to the switch. The non-volatile memory control circuitry can include a channel control circuit coupled to logical units. The channel control circuitry can be configured to relay an erase command to a first one of the logical units and relay a particular command from the switch to a second one of the logical units while the erase command is being executed on the first one of the plurality of logical units.
申请公布号 US9430373(B2) 申请公布日期 2016.08.30
申请号 US201314035505 申请日期 2013.09.24
申请人 Micron Technology, Inc. 发明人 Larson Douglas A.;Brown Jeffrey R.
分类号 G06F12/00;G06F12/02;G11C16/06;G11C16/34;G06F3/06 主分类号 G06F12/00
代理机构 Brooks, Cameron & Huebsch, PLLC 代理人 Brooks, Cameron & Huebsch, PLLC
主权项 1. An apparatus, comprising: a switch internal to the apparatus and coupled to a host interface internal to the apparatus; and non-volatile memory control circuitry internal to the apparatus and coupled to the switch, wherein the non-volatile memory control circuitry includes a channel request queue (CRQ) coupled to a plurality of channel control circuits, which are coupled to a plurality of logical units; wherein each of the channel control circuits includes: a plurality of logical unit command queues (LCQs); anda logical unit request queue (LRQ) coupled to the plurality of LCQs; wherein each of the channel control circuits is configured to relay a respective erase command to a first one of the plurality of logical units; and wherein the CRQ is configured to receive a particular command from the host interface via the switch and relay the particular command to a second one of the plurality of logical units via one of the LRQs while the respective erase command is being executed on the first one of the plurality of logical units.
地址 Boise ID US