LAST BRANCH RECORD INDICATORS FOR TRANSACTIONAL MEMORY
摘要
In one embodiment, a processor includes an execution unit and at least one last branch record (LBR) register to store address information of a branch taken during program execution. This register may further store a transaction indicator to indicate whether the branch was taken during a transactional memory (TM) transaction. This register may further store an abort indicator to indicate whether the branch was caused by a transaction abort. Other embodiments are described and claimed.
申请公布号
WO2012016085(A2)
申请公布日期
2012.02.02
申请号
WO2011US45797
申请日期
2011.07.28
申请人
INTEL CORPORATION;RAJWAR, RAVI;KNAUTH, LAURA A.;LACHNER, PETER;LAI, KONRAD K.
发明人
RAJWAR, RAVI;KNAUTH, LAURA A.;LACHNER, PETER;LAI, KONRAD K.