发明名称 Method of Reducing Delamination in the Fabrication of Small-Pitch Devices
摘要 A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard mask layer over the first hard mask layer; patterning the second hard mask layer to form a hard mask; and, after the step of patterning the second hard mask layer, baking the substrate, the first hard mask layer, and the hard mask. After the step of baking, a spacer layer is formed, which includes a first portion on a top of the hard mask, and a second portion and a third portion on opposite sidewalls of the hard mask. The method further includes removing the first portion of the spacer layer; removing the hard mask; and using the second portion and the third portion of the spacer layer as masks to pattern the first hard mask layer.
申请公布号 US2012028473(A1) 申请公布日期 2012.02.02
申请号 US201113253694 申请日期 2011.10.05
申请人 LAI CHIH-YU;WU CHENG-TA;CHEN NENG-KUO;TSAI CHENG-YUAN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LAI CHIH-YU;WU CHENG-TA;CHEN NENG-KUO;TSAI CHENG-YUAN
分类号 H01L21/302 主分类号 H01L21/302
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