发明名称 |
PREDICTIVE SEQUENTIAL PREFETCHING FOR DATA CACHING |
摘要 |
A system for prefetching memory in caching systems includes a processor that generates requests for data. A cache of a first level stores memory lines retrieved from a lower level memory in response to references to addresses generated by the processor's requests for data. A prefetch buffer is used to prefetch an adjacent memory line from the lower level memory in response to a request for data. The adjacent memory line is a memory line that is adjacent to a first memory line that is associated with an address of the request for data. An indication that a memory line associated with an address associated with the requested data has been prefetched is stored. A prefetched memory line is transferred to the cache of the first level in response to the stored indication that a memory line associated with an address associated with the requested data has been prefetched. |
申请公布号 |
US2012030431(A1) |
申请公布日期 |
2012.02.02 |
申请号 |
US20100843980 |
申请日期 |
2010.07.27 |
申请人 |
ANDERSON TIMOTHY D.;CHIRCA KAI |
发明人 |
ANDERSON TIMOTHY D.;CHIRCA KAI |
分类号 |
G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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