发明名称 Memory module with reduced access granularity
摘要 A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.
申请公布号 EP2393086(A3) 申请公布日期 2012.02.01
申请号 EP20110179126 申请日期 2007.04.30
申请人 RAMBUS INC. 发明人 HAMPEL, CRAIG E.;WARE, FREDERICK A.
分类号 G11C7/10;G06F13/16;G06F13/42;G11C5/04 主分类号 G11C7/10
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