发明名称 Partial averaging circuit and method
摘要 <p>The present invention relates to a circuit (200) for sorting a set of data values (202), the circuit comprising a first set (220) of p+q registers (220a-c) for storing the p+q largest data values of the set of data values including p statistical outliers; a second set (230) of p+q registers (230a-c) for storing the p+q smallest data values of the set of data values including p statistical outliers, wherein p is a non-negative integer and q is a positive integer; a controller (210) coupled to each register in said first and second sets, said controller being arranged to: receive the set of data values and for each data value obtain a comparison result of the data value with the respective data values in each of said registers; and update said registers as a function of said comparison results; the circuit further comprising a data processing circuit (260) coupled to at least the q registers in said first and second sets, which for instance may be used to produce an average value (204) of the data values stored in said q registers in response to the controller. The present invention further relates to a sorting method using such a circuit.</p>
申请公布号 EP2413236(A1) 申请公布日期 2012.02.01
申请号 EP20100171294 申请日期 2010.07.29
申请人 NXP B.V. 发明人 VERMEULEN, HUBERTUS GERARDUS HENDRIKUS;STASCHULAT, JAN;NIEUWLAND, ANDRE KRIJN;STEFFENS, ELISABETH FRANCISCA MARIA
分类号 G06F7/22;G06F7/544;G06F17/18 主分类号 G06F7/22
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