| 摘要 |
A data processing system has two clock domains connected by a FIFO. The clock domain, which writes data into the FIFO, has a lower clock frequency than the domain, which reads data from the FIFO. The system uses a read pattern to determine the clock cycles, on which data is read from the FIFO. The system monitors the pointers used to access data in the FIFO to determine how many data items are in the FIFO. If the number of data items is higher than optimum, an extra read is added to the read pattern on an unused clock cycle. If the number is less than optimum, a read is removed from the read pattern by not reading on one of the currently used read cycles. The write pointer may be passed into the reading clock domain as a Gray code to determine the number of data items. |
